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Davide Cieri

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DOI: 10.1088/1748-0221/12/12/p12019
2017
Cited 29 times
An FPGA based track finder for the L1 trigger of the CMS experiment at the High Luminosity LHC
A new tracking detector is under development for use by the CMS experiment at the High-Luminosity LHC (HL-LHC). A crucial requirement of this upgrade is to provide the ability to reconstruct all charged particle tracks with transverse momentum above 2–3 GeV within 4 μs so they can be used in the Level-1 trigger decision. A concept for an FPGA-based track finder using a fully time-multiplexed architecture is presented, where track candidates are reconstructed using a projective binning algorithm based on the Hough Transform, followed by a combinatorial Kalman Filter. A hardware demonstrator using MP7 processing boards has been assembled to prove the entire system functionality, from the output of the tracker readout boards to the reconstruction of tracks with fitted helix parameters. It successfully operates on one eighth of the tracker solid angle acceptance at a time, processing events taken at 40 MHz, each with up to an average of 200 superimposed proton-proton interactions, whilst satisfying the latency requirement. The demonstrated track-reconstruction system, the chosen architecture, the achievements to date and future options for such a system will be discussed.
DOI: 10.1109/rtc.2016.7543102
2016
Cited 9 times
An FPGA-based track finder for the L1 trigger of the CMS experiment at the high luminosity LHC
A new tracking system is under development for operation in the CMS experiment at the High Luminosity LHC. It includes an outer tracker which will construct stubs, built by correlating clusters in two closely spaced sensor layers for the rejection of hits from low transverse momentum tracks, and transmit them off-detector at 40 MHz. If tracker data is to contribute to keeping the Level-1 trigger rate at around 750 kHz under increased luminosity, a crucial component of the upgrade will be the ability to identify tracks with transverse momentum above 3 GeV/c by building tracks out of stubs. A concept for an FPGA-based track finder using a fully time-multiplexed architecture is presented, where track candidates are identified using a projective binning algorithm based on the Hough Transform. A hardware system based on the MP7 MicroTCA processing card has been assembled, demonstrating a realistic slice of the track finder in order to help gauge the performance and requirements for a full system. This paper outlines the system architecture and algorithms employed, highlighting some of the first results from the hardware demonstrator and discusses the prospects and performance of the completed track finder.
DOI: 10.1088/1748-0221/16/04/t04006
2021
Cited 4 times
Hog (HDL on git): a collaborative management tool to handle git-based HDL repository
Abstract In this paper, we present Hog (HDL on git), a set of Tcl scripts and a suitable methodology to allow a fruitful use of git as a HDL repository and guarantee synthesis and placing reproducibility and binary file traceability. Tcl scripts, able to recreate the HDL projects are committed to the repository. This ensures that all the modifications done to the project are correctly propagated, allowing reproducibility. To make the system more user friendly, all the source files used in each project are listed in dedicated text files that are read out by the project Tcl file and imported into the project. Hog supports Xilinx Vivado, ISE (PlanAhead) and Intel Quartus. To guarantee binary file traceability, Hog links it permanently to a specific git commit by embedding the git-commit hash (SHA) into the binary file via HDL generics stored into firmware registers. This is done by means of a pre-synthesis script, which interacts with the git repository. The project creation and the pre/post synthesis Tcl scripts make use of the Hog utility library, that includes functions to handle git, parse tags, read list files, etc. Gitlab Continuous Integration (CI) is automatically configured by Hog to simulate, synthesise, and build the design. Hog-CI generates binary files and checks for timing violations. This permits validating new modifications before accepting them, by exploiting the Gitlab Merge Request (MR) system. This is meant to avoid the pollution of the official branch, undermining the starting point for other developers. Hog-CI runs on shared and private (where the needed IDE must be installed) Gitlab runners. It can parse MR parameters, allowing the specification of directives through special keywords in the MR title/description on Gitlab website.
DOI: 10.1088/1748-0221/14/02/p02027
2019
Cited 4 times
Hardware demonstrator of a compact first-level muon track trigger for future hadron collider experiments
Single muon triggers are crucial for the physics programmes at hadron collider experiments. To be sensitive to electroweak processes, single muon triggers with transverse momentum thresholds down to 20 GeV and dimuon triggers with even lower thresholds are required. In order to keep the rates of these triggers at an acceptable level these triggers have to be highly selective, i.e. they must have small accidental trigger rates and sharp trigger turn-on curves. The muon systems of the LHC experiments and experiments at future colliders like FCC-hh will use two muon chamber systems for the muon trigger, fast trigger chambers like RPCs with coarse spatial resolution and much slower precision chambers like drift-tube chambers with high spatial resolution. The data of the trigger chambers are used to identify the bunch crossing in which the muon was created and for a rough momentum measurement while the precise measurements of the muon trajectory by the precision chambers are ideal for an accurate muon momentum measurement. A compact muon track finding algorithm is presented, where muon track candidates are reconstructed using a binning algorithm based on a 1D Hough Transform. The algorithm has been designed and implemented on a System-On-Chip device. A hardware demonstration using Xilinx Evaluation boards ZC706 has been set-up to prove the concept. The system has demonstrated the feasibility to reconstruct muon tracks with a good angular resolution, whilst satisfying latency constraints. The demonstrated track-reconstruction system, the chosen architecture, the achievements to date and future options for such a system will be discussed.
DOI: 10.23919/fpl.2017.8056825
2017
Cited 3 times
A novel FPGA-based track reconstruction approach for the level-1 trigger of the CMS experiment at CERN
The Compact Muon Solenoid (CMS) experiment at CERN is scheduled for a major upgrade in the next decade in order to meet the demands of the new High Luminosity Large Hadron Collider.Amongst others, a new tracking system is under development including an outer tracker capable of rejecting low transverse momentum particles by looking at the coincidences of hits (stubs) in two closely spaced sensor layers in the same tracker module.Accepted stubs are transmitted off-detector for further processing at 40 MHz.In order to maintain under the increased luminosity the Level-1 trigger rate at 750 kHz, tracker data need to be included in the decision making process.For this purpose, a system architecture has to be developed that will be able to identify particles with transverse momentum above 3 GeV/c by building tracks out of stubs, while achieving an overall processing latency of maximum 4us.Targeting these requirements the current paper presents an FPGA-based track finding architecture that identifies track candidates in real-time and bases its functionality on a fully time-multiplexed approach.As a proof of concept, a hardware system has been assembled targeting the MP7 MicroTCA processing card that features a Xilinx Virtex-7 FPGA, demonstrating a realistic slice of the track finder.The paper discusses the algorithms' implementation and the efficient utilisation of the available FPGA resources, it outlines the system architecture, and presents some of the hardware demonstrator results.
DOI: 10.1016/j.nima.2015.09.117
2016
L1 track finding for a time multiplexed trigger
At the HL-LHC, proton bunches will cross each other every 25 ns, producing an average of 140 pp-collisions per bunch crossing. To operate in such an environment, the CMS experiment will need a L1 hardware trigger able to identify interesting events within a latency of 12.5 μs. The future L1 trigger will make use also of data coming from the silicon tracker to control the trigger rate. The architecture that will be used in future to process tracker data is still under discussion. One interesting proposal makes use of the Time Multiplexed Trigger concept, already implemented in the CMS calorimeter trigger for the Phase I trigger upgrade. The proposed track finding algorithm is based on the Hough Transform method. The algorithm has been tested using simulated pp-collision data. Results show a very good tracking efficiency. The algorithm will be demonstrated in hardware in the coming months using the MP7, which is a μTCA board with a powerful FPGA capable of handling data rates approaching 1 Tb/s.
DOI: 10.1016/j.nima.2022.167941
2023
Upgrade of the first-level muon trigger for the ATLAS experiment at the HL-LHC
The HL-LHC upgrade will significantly extend the collider’s physics reach with the increased luminosity, and it poses challenging requirements on the performance of the detector, accordingly. To exploit its full physics potential, more selective hardware triggers are required. At the ATLAS experiment, a huge gain in the selectivity of the first-level muon trigger will be accomplished by incorporating the data of the precision tracking muon drift-tube (MDT) chambers into the online muon reconstruction in addition to the fast RPC (Resistive Plate Chambers) and TGC (Thin Gap Chamber) trigger chambers data. For this purpose, the Sector Logic system processing data from the trigger chambers will be complemented by the novel MDT trigger processor (MDTTP) boards.
DOI: 10.1016/j.nima.2023.168016
2023
Hog (HDL on Git): An easy system to handle HDL on a git-based repository
Coordinating firmware development among many international collaborators is becoming a very widespread problem in high-energy physics. Guaranteeing firmware synthesis reproducibility and assuring traceability of binary files is paramount. We devised Hog - HDL on git (cern.ch/hog), a set of Tcl and Shell scripts that tackles these issues and is deeply integrated with HDL IDEs, such as Xilinx Vivado Design Suite and ISE PlanAhead or Intel Quartus Prime, and all major simulation tools, like Siemens ModelSim or Aldec Riviera Pro. Git is a very powerful tool and has been chosen as standard by several research institutions, including CERN. Hog perfectly integrates with git to assure an absolute control of HDL source files, constraint files, IDE and simulation settings. It guarantees traceability by automatically embedding the git commit SHA and a numeric version into the binary file, also automatically renamed. Hog does not rely on any external tool apart from the HDL IDE and git, so it is extremely compatible and does not require any installation. Developers can get quickly up to speed: clone the repository, run the Hog script, work normally with the IDE. The learning curve to use Hog for the users is minimal. Once the HDL project is created, developers can work on it either using the IDE graphical interface, or with the provided Shell scripts to run the workflow. Hog works on Windows and Linux, supports IPbus, Sigasi and provides pre-made YAML files to set up a working Continuous Integration on GitLab (Hog-CI) with no additional effort, which runs the HDL implementation for the desired projects. Other features of Hog-CI are the automatic creation of tags and GitLab releases with timing and utilisation reports. Currently, Hog is successfully used by several firmware projects within the High-Energy Physics community, e.g. in the ATLAS and CMS Phase-II upgrades.
DOI: 10.48550/arxiv.2304.02437
2023
Hog 2023.1: a collaborative management tool to handle Git-based HDL repository
Hog (HDL on Git) is an open-source tool designed to manage Git-based HDL repositories. It aims to simplify HDL project development, maintenance, and versioning by using Git to guarantee synthesis and implementation reproducibility and binary file traceability. This is ensured by linking each produced binary file to a specific Git commit, embedding the Git commit hash (SHA) into the binary file via HDL generics stored in firmware registers. Hog is released twice a year, in January and in June. We present here the latest stable version 2023.1, which introduces major novel features, such as the support for Microchip Libero IDE, and the capability to run the Hog Continuous Integration (Hog-CI) workflow with GitHub Actions. A plan to integrate Hog with the OpenCores repository is also described, which is expected to be completed for Hog release 2023.2
DOI: 10.1109/rtc.2016.7543110
2016
Emulation of a prototype FPGA track finder for the CMS Phase-2 upgrade with the CIDAF emulation framework
The CMS collaboration is preparing a major upgrade of its detector, so it can operate during the high luminosity run of the LHC from 2026. The upgraded tracker electronics will reconstruct the trajectories of charged particles within a latency of a few microseconds, so that they can be used by the level-1 trigger. An emulation framework, CIDAF, has been developed to provide a reference for a proposed FPGA-based implementation of this track finder, which employs a Time-Multiplexed (TM) technique for data processing.
DOI: 10.22323/1.370.0141
2020
Hardware Demonstrator Of The Phase-II ATLAS MDT Trigger Processor
The first level muon trigger of the ATLAS experiment will be upgraded to operate at the High-Luminosity LHC.The selectivity of the current system is limited by the moderate spatial resolution of RPC and TGC.The MDT chambers currently used for precision tracking will be therefore included to improve the momentum resolution and the redundancy.In the upgraded muon trigger system, the MDT trigger processors will receive MDT hits from the detectors and match them to the trigger candidates (seeds) from the RPC and TGC trigger systems.These seeds provide a Region-of-Interest (RoI) and the bunch-crossing timing which is used for calculating the MDT drift time.MDT hits matched to the RoI are then used by the MDT trigger algorithm to improve the momentum resolution, by forming track segments and joining them together for momentum determination.A hardware demonstrator of the MDT trigger processor, based on a common ATCA platform known as "APOLLO", is currently under production.It consists of two separate modules called the "Command Module" and "Service Module", and it is based on FPGA technology.A description of the algorithms for the MDT track reconstruction is presented.The achieved trigger performance allows to reconstruct muon tracks with a momentum resolution of about 6% and a trigger efficiency above 95% for muons with a transverse momentum of 20 GeV.
DOI: 10.1088/1742-6596/762/1/012020
2016
Hardware Demonstrator of a Level-1 Track Finding Algorithm with FPGAs for the Phase II CMS Experiment
At the HL-LHC, proton bunches collide every 25 ns, producing an average of 140 pp interactions per bunch crossing. To operate in such an environment, the CMS experiment will need a Level-1 (L1) hardware trigger, able to identify interesting events within a latency of 12.5 μs. This novel L1 trigger will make use of data coming from the silicon tracker to constrain the trigger rate. Goal of this new track trigger will be to build L1 tracks from the tracker information.
DOI: 10.1088/1748-0221/17/04/c04020
2022
Hog: handling HDL repository on git
Abstract Handling HDL project development within large collaborations presents many challenges in terms of maintenance and versioning, due to the lack of standardised procedures. Hog (HDL on git) is a tcl-based open-source management tool, created to simplify HDL project development and management by exploiting git and Gitlab Continuous Integration (CI). Hog is compatible with the major HDL IDEs from Xilinx and Intel-FPGA, and guarantees synthesis and placing reproducibility and binary file traceability, by linking each binary file to a specific git commit. Hog-CI validates any changes to the code, handles automatic versioning and can automatically simulate, synthesise and build the design.
DOI: 10.22323/1.313.0131
2018
An FPGA-based Track Finder for the L1 Trigger of the CMS Experiment at the HL-LHC
A new tracking detector is under development for use by the CMS experiment at the High-Luminosity LHC (HL-LHC).A crucial component of this upgrade will be the ability to reconstruct within a few microseconds all charged particle tracks with transverse momentum above 3 GeV, so they can be used in the Level-1 trigger decision.A concept for an FPGA-based track finder using a fully time-multiplexed architecture is presented, where track candidates are reconstructed using a projective binning algorithm based on the Hough Transform followed by a track fitting based on the linear regression technique.A hardware demonstrator using MP7 processing boards has been assembled to prove the entire system, from the output of the tracker readout boards to the reconstruction of tracks with fitted helix parameters.It successfully operates on one eighth of the tracker solid angle at a time, processing events taken at 40 MHz, each with up to 200 superimposed proton-proton interactions, whilst satisfying latency constraints.The demonstrated track-reconstruction system, the chosen architecture, the achievements to date and future options for such a system will be discussed.
2018
Development of a Level-1 Track and Vertex Finder for the Phase II CMS experiment upgrade
DOI: 10.1016/j.nima.2019.01.035
2019
First-level muon track trigger for future hadron collider experiments
Single muon triggers are crucial for the physics programmes as hadron collider experiments. To be sensitive to electroweak processes, single muon triggers with transverse momentum thresholds down to 20 GeV and dimuon triggers with even lower thresholds are required. In order to keep the rates of these triggers at an acceptable level these triggers have to be highly selective, i.e. they must have small accidental trigger rates and sharp trigger turn-on curves. The muon systems of the LHC experiments and experiments at future colliders like FCC-hh will use two muon chamber systems for the muon trigger, fast trigger chambers like RPCs with coarse spatial resolution and much slower precision chambers like drift–tube chambers with high spatial resolution. The data of the trigger chambers are used to identify the bunch crossing in which the muon was created and for a rough momentum measurement while the precise measurements of the muon trajectory by the precision chambers are ideal for an accurate muon momentum measurement. A concept for the muon trigger of the baseline detector for the FCC-hh which exploits the precision measurements of drift–tube chambers is presented including the description and the test of a compact muon track reconstruction algorithm.
DOI: 10.22323/1.343.0051
2019
A Lightweight First-Level Muon Track Trigger for Future Hadron Collider Experiments
Single muon triggers are crucial for the physics programmes at hadron collider experiments. To keep the trigger rates reasonably low they must be highly selective. Muon systems at LHC experiments and at future colliders use two muon chamber system for triggering: fast trigger chambers to identify the bunch crossing and provide a coarse momentum estimation, and slower precision chambers, for precise measurements of the muon trajectory. A fast lightweight track finding algorithm, based on the Hough Transform and Linear Regression techniques, has been designed and implemented on a Zynq SoC device, reconstructing successfully muon tracks in a single trigger sector.
DOI: 10.1109/nss/mic42101.2019.9059614
2019
Design of a Highly Selective Muon Trigger System for Future Hadron Collider Experiments
Experiments at future hadron colliders like the High-Luminosity LHC or the proposed 100 TeV circular collider FCC-hh will provide a unique opportunity to explore the limits of the Standard Model of the strong and electroweak interactions and to search for physics beyond the Standard Model. Excellent muon identification and trigger capabilities will be crucial to exploit the experiments' physics potential. To achieve this goal the muon systems of these experiments will use both fast trigger chambers with nanosecond temporal, but poor spatial resolution and slower precision muon chambers with sub-micrometer spatial resolution for stand-alone momentum measurements. In this contribution a trigger system for the FCC-hh detector is introduced which uses thin-gap resistive plate chambers for bunch crossing identification and small diameter cylindrical drift tube chambers for an accurate momentum measurement both at trigger level and offline. Trigger algorithms and their VHDL implementation will be presented as well as the design of a hardware demonstrator employing modern high-performance FPGAs with more than 100 high-speed transceivers.
2020
Upgrade of the ATLAS Muon Trigger for the HL-LHC