Branislav Ristić

HV-CMOS pixel sensors are a promising option for the tracker upgrade of the ATLAS experiment at the LHC, as well as for other future tracking applications in which large areas are to be instrumented with radiation-tolerant silicon pixel sensors. We present results of testbeam characterisations of the $4^{\mathrm{th}}$ generation of Capacitively Coupled Pixel Detectors (CCPDv4) produced with the ams H18 HV-CMOS process that have been irradiated with different particles (reactor neutrons and 18 MeV protons) to fluences between $1\cdot 10^{14}$ and $5\cdot 10^{15}$ 1-MeV-n$_\textrm{eq}$/cm$^2$. The sensors were glued to ATLAS FE-I4 pixel readout chips and measured at the CERN SPS H8 beamline using the FE-I4 beam telescope. Results for all fluences are very encouraging with all hit efficiencies being better than 97% for bias voltages of $85\,$V. The sample irradiated to a fluence of $1\cdot 10^{15}$ n$_\textrm{eq}$/cm$^2$ - a relevant value for a large volume of the upgraded tracker - exhibited 99.7% average hit efficiency. The results give strong evidence for the radiation tolerance of HV-CMOS sensors and their suitability as sensors for the experimental HL-LHC upgrades and future large-area silicon-based tracking detectors in high-radiation environments.

A testbeam telescope, based on ATLAS IBL silicon pixel modules, has been built. It comprises six planes of planar silicon sensors with 250 × 50 μ m2 pitch, read out by ATLAS FE-I4 chips. In the CERN SPS H8 beamline (180 GeV π+) a resolution of better than 8 × 12 μm2 at the position of the device under test was achieved. The telescope reached a trigger rate of 6 kHz with two measured devices. It is mainly designed for studies using FE-I4 based prototypes, but has also been successfully run with independent DAQ systems. Specialised trigger schemes ensure data synchronisation between these external devices and the telescope. A region-of-interest trigger can be formed by setting masks on the first and the last pixel sensor planes. The setup infrastructure provides centrally controlled and monitored high and low voltage power supplies, silicon oil cooling, temperature and humidity sensors and movable stages.

Results of beam tests with planar silicon pixel sensors aimed towards the ATLAS Insertable B-Layer and High Luminosity LHC (HL-LHC) upgrades are presented. Measurements include spatial resolution, charge collection performance and charge sharing between neighbouring cells as a function of track incidence angle for different bulk materials. Measurements of n-in-n pixel sensors are presented as a function of fluence for different irradiations. Furthermore p-type silicon sensors from several vendors with slightly differing layouts were tested. All tested sensors were connected by bump-bonding to the ATLAS Pixel read-out chip. We show that both n-type and p-type tested planar sensors are able to collect significant charge even after integrated fluences expected at HL-LHC.

High voltage CMOS (HVCMOS) sensors are presently considered for the use in Mu3e experiment, ATLAS and CLIC. These sensors can be implemented in commercial HVCMOS processes. HVCMOS sensors feature fast charge collection by drift and high radiation tolerance. The sensor element is an n-well/p-type diode. This proceeding-paper gives an overview of HVCMOS projects and the recent results.

The high-voltage (HV-) CMOS pixel sensors offer several good properties: a fast charge collection by drift, the possibility to implement relatively complex CMOS in-pixel electronics and the compatibility with commercial processes. The sensor element is a deep n-well diode in a p-type substrate. The n-well contains CMOS pixel electronics. The main charge collection mechanism is drift in a shallow, high field region, which leads to a fast charge collection and a high radiation tolerance. We are currently evaluating the use of the high-voltage detectors implemented in 180 nm HV-CMOS technology for the high-luminosity ATLAS upgrade. Our approach is replacing the existing pixel and strip sensors with the CMOS sensors while keeping the presently used readout ASICs. By intelligence we mean the ability of the sensor to recognize a particle hit and generate the address information. In this way we could benefit from the advantages of the HV sensor technology such as lower cost, lower mass, lower operating voltage, smaller pitch, smaller clusters at high incidence angles. Additionally we expect to achieve a radiation hardness necessary for ATLAS upgrade. In order to test the concept, we have designed two HV-CMOS prototypes that can be readout in two ways: using pixel and strip readout chips. In the case of the pixel readout, the connection between HV-CMOS sensor and the readout ASIC can be established capacitively.

High Voltage CMOS sensors are a promising technology for tracking detectors in collider experiments. Extensive R&D studies are being carried out by the ATLAS Collaboration for a possible use of HV-CMOS in the High Luminosity LHC upgrade of the Inner Tracker detector. CaRIBOu (Control and Readout Itk BOard) is a modular test system developed to test Silicon based detectors. It currently includes five custom designed boards, a Xilinx ZC706 development board, FELIX (Front-End LInk eXchange) PCIe card and a host computer. A software program has been developed in Python to control the CaRIBOu hardware. CaRIBOu has been used in the testbeam of the HV-CMOS sensor CCPDv4 at CERN. Preliminary results have shown that the test system is very versatile. Further development is ongoing to adapt to different sensors, and to make it available to various lab test stands.

Deep sub micron HV-CMOS processes offer the opportunity for sensors built by industry standard techniques while being HV tolerant, making them good candidates for drift-based, fast collecting, thus radiation-hard pixel detectors. For the upgrade of the ATLAS Pixel Detector towards the HL-LHC requirements, active pixel sensors in HV-CMOS technology were investigated. These implement signal processing electronics in deep n-wells, which also act as collecting electrodes. The deep n-wells allow for bias voltages up to 150 V leading to a depletion depth of several 10 μm. Prototype sensors in the AMS H18 180 nm and H35 350 nm HV-CMOS processes were thoroughly tested in lab measurements as well as in testbeam experiments. Irradiations with X-rays and protons revealed a tolerance to ionizing doses of 1 Grad while Edge-TCT studies assessed the effects of radiation on the charge collection. The sensors showed high detection efficiencies after neutron irradiation to 1015neqcm−2 in testbeam experiments. A full reticle size demonstrator chip, implemented in the H35 process is being submitted to prove the large scale feasibility of the HV-CMOS concept.

Active pixel sensors based on the High-Voltage CMOS technology are being investigated as a viable option for the future pixel tracker of the ATLAS experiment at the High-Luminosity LHC. This paper reports on the testbeam measurements performed at the H8 beamline of the CERN Super Proton Synchrotron on a High-Voltage CMOS sensor prototype produced in 180 nm AMS technology. Results in terms of tracking efficiency and timing performance, for different threshold and bias conditions, are shown.

An upgrade of the ATLAS experiment for the High Luminosity phase of LHC is planned for 2024 and foresees the replacement of the present Inner Detector (ID) with a new Inner Tracker (ITk) completely made of silicon devices. Depleted active pixel sensors built with the High Voltage CMOS (HV-CMOS) technology are investigated as an option to cover large areas in the outermost layers of the pixel detector and are especially interesting for the development of monolithic devices which will reduce the production costs and the material budget with respect to the present hybrid assemblies. For this purpose the H35DEMO, a large area HV-CMOS demonstrator chip, was designed by KIT, IFAE and University of Liverpool, and produced in AMS 350 nm CMOS technology. It consists of four pixel matrices and additional test structures. Two of the matrices include amplifiers and discriminator stages and are thus designed to be operated as monolithic detectors. In these devices the signal is mainly produced by charge drift in a small depleted volume obtained by applying a bias voltage of the order of 100 V. Moreover, to enhance the radiation hardness of the chip, this technology allows to enclose the electronics in the same deep N-WELLs which are also used as collecting electrodes. In this contribution the characterisation of H35DEMO chips and results of the very first beam test measurements of the monolithic CMOS matrices with high energetic pions at CERN SPS will be presented.

In the context of the studies of the ATLAS High Luminosity LHC programme, radiation tolerant pixel detectors in CMOS technologies are investigated. To evaluate the effects of substrate resistivity on CMOS sensor performance, the H35DEMO demonstrator, containing different diode and amplifier designs, was produced in ams H35 HV-CMOS technology using four different substrate resistivities spanning from 80-1000 ohm cm-1. A glueing process using a high-precision flip-chip machine was developed in order to capacitively couple the sensors to FE-I4 Readout ASIC using a thin layer of epoxy glue with good uniformity over a large surface. The resulting assemblies were measured in beam test at the Fermilab Test Beam Facilities with 120 GeV protons and CERN SPS H8 beamline using 180 GeV pions. The in-time efficiency and tracking properties measured for the different sensor types are shown to be compatible with the ATLAS ITk requirements for its pixel sensors.

During the long shutdown (LS) 3 beginning 2022 the LHC will be upgraded for higher luminosities pushing the limits especially for the inner tracking detectors of the LHC experiments. In order to cope with the increased particle rate and radiation levels the ATLAS Inner Detector will be completely replaced by a purely silicon based one. Novel sensors based on HV-CMOS processes prove to be good candidates in terms of spatial resolution and radiation hardness. In this paper measurements conducted on prototypes built in the AMS H18 HV-CMOS process and irradiated to fluences of up to $2\cdot10^{16}\,\text{n}_\text{eq}\text{cm}^{-2}$ are presented.

In order to extend its discovery potential, the Large Hadron Collider (LHC) will have a major upgrade (Phase II Upgrade) scheduled for 2022. The LHC after the upgrade, called High-Luminosity LHC (HL-LHC), will operate at a nominal leveled instantaneous luminosity of 5× 1034 cm−2 s−1, more than twice the expected Phase I . The new Inner Tracker needs to cope with this extremely high luminosity. Therefore it requires higher granularity, reduced material budget and increased radiation hardness of all components. A new pixel detector based on High Voltage CMOS (HVCMOS) technology targeting the upgraded ATLAS pixel detector is under study. The main advantages of the HVCMOS technology are its potential for low material budget, use of possible cheaper interconnection technologies, reduced pixel size and lower cost with respect to traditional hybrid pixel detector. Several first prototypes were produced and characterized within ATLAS upgrade R&D effort, to explore the performance and radiation hardness of this technology.

With the planned upgrades of the LHC towards high luminosity operation, the entire CMS silicon tracker will be replaced in order to cope with the resulting elevated pileup and radiation levels.To fulfill these requirements for the CMS pixel detector, a new readout chip was developed by the RD53 collaboration in 65 nm CMOS technology, featuring a higher readout bandwidth along with increased granularity and radiation tolerance.These chips are operated at high currents rendering the classical parallel powering of individual devices inefficient.A serial powering concept was therefore developed where the input current is shared by a chain of devices.This reduces considerably the power loss in the detector services thus keeping the requirements for powering and cooling at acceptable levels.Based on the availability of the Shunt-LDO, a voltage regulator compatible with the serial powering scheme, on the RD53 chip, a novel module concept was developed.This paper presents the module design and implementation based on the prototype RD53A devices which were evaluated in single operation and as part of a serial powering scheme.

Both the current upgrades to accelerator-based HEP detectors (e.g. ATLAS, CMS) and also future projects (e.g. CEPC, FCC) feature large-area silicon-based tracking detectors. We are investigating the feasibility of using CMOS foundries to fabricate silicon radiation detectors, both for pixels and for large-area strip sensors. A successful proof of concept would open the market potential of CMOS foundries to the HEP community, which would be most beneficial in terms of availability, throughput and cost. In addition, the availability of multi-layer routing of signals will provide the freedom to optimize the sensor geometry and the performance, with biasing structures implemented in poly-silicon layers and MIM-capacitors allowing for AC coupling. A prototyping production of strip test structures and RD53A compatible pixel sensors was recently completed at LFoundry in a 150nm CMOS process. This presentation will focus on the characterization of pixel modules, studying the performance in terms of charge collection, position resolution and hit efficiency with measurements performed in the laboratory and with beam tests. We will report on the investigation of RD53A modules with 25x100 μm 2 cell geometry.

We are investigating the feasibility of using CMOS foundries to fabricate silicon detectors, both for pixels and for large-area strip sensors. The availability of multi-layer routing will provide the freedom to optimize the sensor geometry and the performance, with biasing structures in poly-silicon layers and MIM-capacitors allowing for AC coupling. A prototyping production of strip test-structures and RD53A compatible pixel sensors was recently completed at LFoundry in a 150$\,$nm CMOS process. This paper will focus on the characterization of irradiated and non-irradiated pixel modules, composed by a CMOS passive sensor interconnected to a RD53A chip. The sensors are designed with a pixel cell of $25\times100\,\mu \mathrm{m}^2$ in case of DC coupled devices and $50\times50\,\mu \mathrm{m}^2$ for the AC coupled ones. Their performance in terms of charge collection, position resolution, and hit efficiency was studied with measurements performed in the laboratory and with beam tests. The RD53A modules with LFoundry silicon sensors were irradiated to fluences up to $1.0\times10^{16}\,\frac{\mathrm{n}_\mathrm{eq}}{\mathrm{cm}^2}$.

Luminosity upgrades are discussed for the LHC (HL-LHC) which would make updates to the detectors necessary, requiring in particular new, even more radiation-hard and granular, sensors for the inner detector region.

MoTiC (Monolithic Timing Chip) is a prototype DMAPS Chip that builds on sensor technology developed in the ARCADIA project.The 50 by 50 µm 2 pixels contain a small charge collecting electrode with a very low capacitance surrounded by radiation-hard in-pixel electronics.The chip contains a matrix of 5120 pixels on an area of 3.2 by 4 mm 2 .Each pixel features a trimmable and maskable comparator with a sample and hold circuit for the analog pulse height.Groups of 4 pixels share a TDC situated also in the readout matrix.This work presents the chip design and preliminary results of the hit efficiencies and spatial resolution measured in a first test beam campaign with 4-5 GeV/c electrons conducted at DESY.

The high luminosity upgrade of the LHC necessitates a complete exchange of the current ATLAS Inner Tracker for a purely silicon one. Large areas therefore have to be covered by radiation tolerant, low cost and low material budget silicon detectors. New approaches are being explored using CMOS pixel sensors, providing charge collection in a depleted layer. They are based on technologies that allow to use high depletion voltages and high resistivity wafers for large depletion depths with multiple nested wells, enabling for CMOS electronics to be embedded safely into the sensor substrate. We are investigating depleted CMOS pixel detectors with monolithic or hybrid designs in view of their suitability for high trigger rates, fast timing and the high radiation environment at HL-LHC. This paper will discuss recent results of the main candidate technologies and the current developments towards a monolithic solution.

This article was mainly written by a team of high school students that have won the CERN Beamline for Schools (BL4S) competition in 2017. They had some help from professional scientists, in particular Branislav Ristic. The team had proposed to set up an experiment to search for elementary particles with a fractional electric charge. This paper describes the preparation of their proposal, experimental setup, detectors and data analysis throughout the search for such particles using a 10[Formula: see text]GeV[Formula: see text][Formula: see text] proton beam with a fixed iron target. It was clear to the team that the chance for finding such particles in a relatively simple experiment was minimal but that by doing this experiment they would learn a lot about experimental physics. Due to large amounts of noise, the result of the experiment is inconclusive. Further experimentation to search for these hypothesized particle is encouraged.

Both the current upgrades to accelerator-based HEP detectors (e.g. ATLAS, CMS) and also future projects (e.g. CEPC, FCC) feature large-area silicon-based tracking detectors. We are investigating the feasibility of using CMOS foundries to fabricate silicon radiation detectors, both for pixels and for large-area strip sensors. A successful proof of concept would open the market potential of CMOS foundries to the HEP community, which would be most beneficial in terms of availability, throughput and cost. In addition, the availability of multi-layer routing of signals will provide the freedom to optimize the sensor geometry and the performance, with biasing structures implemented in poly-silicon layers and MIM-capacitors allowing for AC coupling. A prototyping production of strip test structures and RD53A compatible pixel sensors was recently completed at LFoundry in a 150nm CMOS process. This presentation will focus on the characterization of pixel modules, studying the performance in terms of charge collection, position resolution and hit efficiency with measurements performed in the laboratory and with beam tests. We will report on the investigation of RD53A modules with 25x100 mu^2 cell geometry.

In the context of the studies of the ATLAS High Luminosity LHC programme, radiation tolerant pixel detectors in CMOS technologies are investigated. To evaluate the effects of substrate resistivity on CMOS sensor performance, the H35DEMO demonstrator, containing different diode and amplifier designs, was produced in ams H35 HV-CMOS technology using four different substrate resistivities spanning from $\mathrm{80}$ to $\mathrm{1000~\Omega \cdot cm}$. A glueing process using a high-precision flip-chip machine was developed in order to capacitively couple the sensors to FE-I4 Readout ASIC using a thin layer of epoxy glue with good uniformity over a large surface. The resulting assemblies were measured in beam test at the Fermilab Test Beam Facilities with 120 GeV protons and CERN SPS H8 beamline using 80 GeV pions. The in-time efficiency and tracking properties measured for the different sensor types are shown to be compatible with the ATLAS ITk requirements for its pixel sensors.

In 2014 CERN has started to organize "Beamline for Schools" (BL4S), an annual physics competition for high-school students aged 16 or more.In the competition, teams of students from all around the world are invited to propose an experiment to CERN that makes use of a secondary beam of particles with momenta of up to 10 GeV/c from CERN's Proton Synchrotron.In the first four years of the competition, 6900 students from all around the world have participated and in total eight winning teams have been selected and invited to CERN for ten to twelve days each.We will describe the challenges linked to the Beamline for Schools competition, focussing on the communication with all teams in the preparatory phase of the competition, the technical implementation of the winning experiments, the operation of the experiments as well as on the support for the teams analysing the data and preparing publications of the results.We will also report on the impact of the competition on the candidate teams as well as on the winners.Finally, we will present an outlook for the future of the BL4S competition, taking into account the shutdown of the accelerators at CERN in 2019 and 2020.

CERN Beamline for Schools is an annual worldwide competition for high-school students.Teams of students are invited to propose an experiment with one of the secondary beams of the Proton Synchrotron and two winning experiments are performed each year by students with a help of CERN experts.We will describe detectors available to students, with emphasis on design and performance of recently added Multi-Gap Resistive Plate Chambers and MicroMegas chambers which were constructed in collaboration with CERN detector experts.

In the search for new physics, the Large Hadron Collider at CERN will be upgraded around year 2025, increasing its integrated luminosity by an order of magnitude. For the Inner Tracker (ITk) of the ATLAS experiment, the elevated levels of radiation, pile-up and data rate will require a complete replacement. Active pixel sensors built in sub-micron High Voltage CMOS (HV-CMOS) processes are candidates for the ITk outer pixel detector layers. Being high voltage tolerant, thus supporting drift-based charge collection, they allow to build radiation hard detectors in industry standard technology. On-sensor signal processing permits replacing complex and cost-intensive hybridisation techniques by simpler ones, ultimately leading to fully monolithic devices. In this thesis, sensors built in the ams H18 180nm process were investigated as hybrid detectors. Several design versions were characterised in laboratory and in-beam measurements. The FE-I4 Telescope, a particle tracker for beam based detector characterisation was built to facilitate measurements on HV-CMOS sensors. Its construction and performance as well as the findings on detection performance of the HV-CMOS prototypes, especially after irradiation, are presented.

The RD53A is a prototype of the readout chip that will be used in the Compact Muon Solenoid (CMS) pixel detector after the High-Lumi LHC (HL-LHC) upgrade is complete beyond 2025. A new feature of the chip enables the writing of configuration commands between triggers during operation. This feature can be used to compensate for a detuning of the pixels due to radiation damage or temperature fluctuations over time. This paper studies the efficiency of such a method as well as its side-effects and the dependency on its parameters using an equivalent software implementation.

Both the current upgrades to accelerator-based HEP detectors (e.g. ATLAS, CMS) and also future projects (e.g. CEPC, FCC) feature large-area silicon-based tracking detectors. We are investigating the feasibility of using CMOS foundries to fabricate silicon radiation detectors, both for pixels and for large-area strip sensors. A successful proof of concept would open the market potential of CMOS foundries to the HEP community, which would be most beneficial in terms of availability, throughput and cost. In addition, the availability of multi-layer routing of signals will provide the freedom to optimize the sensor geometry and the performance, with biasing structures implemented in poly-silicon layers and MIM-capacitors allowing for AC coupling. A prototyping production of strip test structures and RD53A compatible pixel sensors was recently completed at LFoundry in a 150nm CMOS process. This presentation will focus on the characterization of pixel modules, studying the performance in terms of charge collection, position resolution and hit efficiency with measurements performed in the laboratory and with beam tests. We will report on the investigation of RD53A modules with 25x100 mu^2 cell geometry.