A. Macchiolo

The R&D activity presented is focused on the development of new modules for the upgrade of the ATLAS pixel system at the High Luminosity LHC (HL-LHC). The performance after irradiation of n-in-p pixel sensors of different active thicknesses is studied, together with an investigation of a novel interconnection technique offered by the Fraunhofer Institute EMFT in Munich, the Solid-Liquid-InterDiffusion (SLID), which is an alternative to the standard solder bump-bonding. The pixel modules are based on thin n-in-p sensors, with an active thickness of 75 um or 150 um, produced at the MPI Semiconductor Laboratory (MPI HLL) and on 100 um thick sensors with active edges, fabricated at VTT, Finland. Hit efficiencies are derived from beam test data for thin devices irradiated up to a fluence of 4e15 neq/cm^2. For the active edge devices, the charge collection properties of the edge pixels before irradiation is discussed in detail, with respect to the inner ones, using measurements with radioactive sources. Beyond the active edge sensors, an additional ingredient needed to design four side buttable modules is the possibility of moving the wire bonding area from the chip surface facing the sensor to the backside, avoiding the implementation of the cantilever extruding beyond the sensor area. The feasibility of this process is under investigation with the FE-I3 SLID modules, where Inter Chip Vias are etched, employing an EMFT technology, with a cross section of 3 um x 10 um, at the positions of the original wire bonding pads.

The Compact Muon Solenoid (CMS) is one of the experiments at the Large Hadron Collider (LHC) under construction at CERN. Its inner tracking system consist of the world largest Silicon Strip Tracker (SST). In total it implements 24,244 silicon sensors covering an area of 206m2. To construct a large system of this size and ensure its functionality for the full lifetime of 10 years under LHC condition, the CMS collaboration developed an elaborate design and a detailed quality assurance program. This paper describes the strategy and shows first results on sensor qualification.

Results of beam tests with planar silicon pixel sensors aimed towards the ATLAS Insertable B-Layer and High Luminosity LHC (HL-LHC) upgrades are presented. Measurements include spatial resolution, charge collection performance and charge sharing between neighbouring cells as a function of track incidence angle for different bulk materials. Measurements of n-in-n pixel sensors are presented as a function of fluence for different irradiations. Furthermore p-type silicon sensors from several vendors with slightly differing layouts were tested. All tested sensors were connected by bump-bonding to the ATLAS Pixel read-out chip. We show that both n-type and p-type tested planar sensors are able to collect significant charge even after integrated fluences expected at HL-LHC.

We are pursuing scribe–cleave–passivate (SCP) technology of making "slim edge" sensors. Such sensors have only a minimal amount of inactive peripheral region, which benefits construction of large-area tracker and imaging systems. Key application steps of this method are surface scribing, cleaving, and passivation of the resulting sidewall. We are working on developing both the technology and physical understanding of the processed devices performance. In this paper we begin by reviewing the manufacturing options of SCP technology. Then we show new results regarding the technology automation and device physics performance. The latter includes charge collection efficiency near the edge and radiation hardness study. We also report on the status of devices processed at the request of the RD50 collaborators.

Pixel sensors using 8'' CMOS processing technology have been designed and characterized offering the benefits of industrial sensor fabrication, including large wafers, high throughput and yield, as well as low cost. The pixel sensors are produced using a 150 nm CMOS technology offered by LFoundry in Avezzano. The technology provides multiple metal and polysilicon layers, as well as metal-insulator-metal capacitors that can be employed for AC-coupling and redistribution layers. Several prototypes were fabricated and are characterized with minimum ionizing particles before and after irradiation to fluences up to 1.1 × 1015 neq cm−2. The CMOS-fabricated sensors perform equally well as standard pixel sensors in terms of noise and hit detection efficiency. AC-coupled sensors even reach 100% hit efficiency in a 3.2 GeV electron beam before irradiation.

Analogue test structures were fabricated using the Tower Partners Semiconductor Co. CMOS 65 nm ISC process. The purpose was to characterise and qualify this process and to optimise the sensor for the next generation of Monolithic Active Pixels Sensors for high-energy physics. The technology was explored in several variants which differed by: doping levels, pixel geometries and pixel pitches (10-25 $\mu$m). These variants have been tested following exposure to varying levels of irradiation up to 3 MGy and $10^{16}$ 1 MeV n$_\text{eq}$ cm$^{-2}$. Here the results from prototypes that feature direct analogue output of a 4$\times$4 pixel matrix are reported, allowing the systematic and detailed study of charge collection properties. Measurements were taken both using $^{55}$Fe X-ray sources and in beam tests using minimum ionizing particles. The results not only demonstrate the feasibility of using this technology for particle detection but also serve as a reference for future applications and optimisations.

We report on the design, manufacturing and first characterisation of pad diodes, test structures and microstrip detectors processed with high resistivity magnetic Czochralski (MCz) p- and n-type Si. The pre-irradiation study on newly processed microstrip detectors and test structures show a good overall quality of the processed wafers. After irradiation with 24 GeV/c protons up to 4×1014 cm-2 the characterisation of n-on-p and p-on-n MCz Si sensors with the C–V method show a decrease of the full depletion voltage and no space charge sign inversion. Microscopic characterisation has been performed to study the role of thermal donors in Czochralski Si. No evidence of thermal donor activation was observed in n-type MCz Si detectors if contact sintering was performed at a temperature lower than 380 °C and the final passivation oxide was omitted.

The performance of novel n-in-p planar pixel detectors, designed for future upgrades of the ATLAS Pixel system is presented. The n-in-p silicon sensors technology is a promising candidate for the pixel upgrade thanks to its radiation hardness and cost effectiveness, that allow for enlarging the area instrumented with pixel detectors. The n-in-p modules presented here are composed of pixel sensors produced by CiS connected by bump-bonding to the ATLAS readout chip FE-I3. The characterization of these devices has been performed before and after irradiation up to a fluence of 5 x 10**15 1 MeV neq cm-2 . Charge collection measurements carried out with radioactive sources have proven the functioning of this technology up to these particle fluences. First results from beam test data with a 120 GeV/c pion beam at the CERN-SPS are also discussed, demonstrating a high tracking efficiency of (98.6 \pm 0.3)% and a high collected charge of about 10 ke for a device irradiated at the maximum fluence and biased at 1 kV.

We present an R&D activity aiming to develop a new detector concept in the framework of the ATLAS pixel detector upgrade in view of the Super-LHC. The new devices combine 75–150 μm thick pixels sensors with a vertical integration technology. A new production of thin pixel sensors on n- and p-type material is under way at the MPI Semiconductor Laboratory. These devices will be connected to the ATLAS read-out electronics with the new Solid–Liquid InterDiffusion technique as an alternative to the bump-bonding process. We also plan for the signals to be extracted from the back of the electronics wafer through Inter-Chip-Vias. The compatibility of the Solid–Liquid InterDiffusion process with the silicon sensor functionality has already been demonstrated by measurements on two wafers hosting diodes with an active thickness of 50 μm.

The existing ATLAS Tracker will be at its functional limit for particle fluences of 10^15 neq/cm^2 (LHC). Thus for the upgrades at smaller radii like in the case of the planned Insertable B-Layer (IBL) and for increased LHC luminosities (super LHC) the development of new structures and materials which can cope with the resulting particle fluences is needed. N-in-p silicon devices are a promising candidate for tracking detectors to achieve these goals, since they are radiation hard, cost efficient and are not type inverted after irradiation. A n-in-p pixel production based on a MPP/HLL design and performed by CiS (Erfurt, Germany) on 300 μm thick Float-Zone material is characterised and the electrical properties of sensors and single chip modules (SCM) are presented, including noise, charge collection efficiencies, and measurements with MIPs as well as an 241Am source. The SCMs are built with sensors connected to the current the ATLAS read-out chip FE-I3. The characterisation has been performed with the ATLAS pixel read-out systems, before and after irradiation with 24 GeV/c protons. In addition preliminary testbeam results for the tracking efficiency and charge collection, obtained with a SCM, are discussed.

In view of the High Luminosity upgrade of the Large Hadron Collider (HL-LHC), planned to start around 2023–2025, the ATLAS experiment will undergo a replacement of the Inner Detector. A higher luminosity will imply higher irradiation levels and hence will demand more radiation hardness especially in the inner layers of the pixel system. The n-in-p silicon technology is a promising candidate to instrument this region, also thanks to its cost-effectiveness because it only requires a single sided processing in contrast to the n-in-n pixel technology presently employed in the LHC experiments. In addition, thin sensors were found to ensure radiation hardness at high fluences. An overview is given of recent results obtained with not irradiated and irradiated n-in-p planar pixel modules. The focus will be on n-in-p planar pixel sensors with an active thickness of 100 and 150 μm recently produced at ADVACAM. To maximize the active area of the sensors, slim and active edges are implemented. The performance of these modules is investigated at beam tests and the results on edge efficiency will be shown.

A new pixel module concept is presented utilizing thin sensors and a novel vertical integration technique for the ATLAS pixel detector in view of the foreseen LHC luminosity upgrades. A first set of pixel sensors with active thicknesses of 75 and 150μm has been produced from wafers of standard thickness using a thinning process developed at the Max-Planck-Institut Halbleiterlabor (HLL) and the Max-Planck-Institut für Physik (MPP). Pre-irradiation characterizations of these sensors show a very good device yield and high break down voltage. First proton irradiations up to a fluence of 1015 neq cm−2 have been carried out and their impact on the electrical properties of thin sensors has been studied. The novel ICV-SLID vertical integration technology will allow for routing signals vertically to the back side of the readout chips. With this, four-side buttable detector devices with an increased active area fraction are made possible. A first production of SLID test structures was performed and showed a high connection efficiency for different pad sizes and a mild sensitivity to disturbances of the surface planarity.

The ATLAS experiment will undergo a major upgrade of the tracker system in view of the high luminosity phase of the LHC (HL-LHC) foreseen to start around 2025. Thin planar pixel modules are promising candidates to instrument the new pixel system, thanks to the reduced contribution to the material budget and their high charge collection efficiency after irradiation. New designs of the pixel cells, with an optimized biasing structure, have been implemented in n-in-p planar pixel productions with sensor thicknesses of 270 um. Using beam tests, the gain in hit efficiency is investigated as a function of the received irradiation fluence. The outlook for future thin planar pixel sensor productions will be discussed, with a focus on thin sensors with a thickness of 100 and 150 um and a novel design with the optimized biasing structure and small pixel cells (50 um x 50 um and 25 um x 100 um). These dimensions are foreseen for the new ATLAS read-out chip in 65 nm CMOS technology and the fine segmentation will represent a challenge for the tracking in the forward region of the pixel system at HL-LHC. To predict the performance of 50 um x 50 um pixels at high eta, FE-I4 compatible planar pixel sensors have been studied before and after irradiation in beam tests at high incidence angle with respect to the short pixel direction. Results on cluster shapes, charge collection- and hit efficiency will be shown.

Abstract A new type of n-in-p planar pixel sensors have been developed at KEK/HPK in order to cope with the maximum particle fluence of 1–3×1016 1 MeV equivalent neutrons per square centimeter ( n eq / cm 2 ) in the upcoming LHC upgrades. Four n-in-p devices were connected by bump-bonding to the new ATLAS Pixel front-end chip (FE-I4A) and characterized before and after the irradiation to 2×1015 n eq / cm 2 . These planar sensors are 150 μ m thick, using biasing structures made out of polysilicon or punch-through dot and isolation structures of common or individual p-stop. Results of measurements with radioactive 90Sr source and with a 120 GeV/c momentum pion beam at the CERN Super Proton Synchrotron (SPS) are presented. The common p-stop isolation structure shows a better performance than the individual p-stop design, after the irradiation. The flat distribution of the collected charge in the depth direction after the irradiation implies that the effect of charge trapping is small, at the fluence, with the bias voltage well above the full depletion voltage.

A new pixel module concept is presented, where thin sensors and a novel vertical integration technique are combined. This R&D activity is carried out in view of the ATLAS pixel detector upgrades. A first set of n-in-p pixel sensors with active thicknesses of 75 and 150μm has been produced using a thinning technique developed at the Max-Planck-Institut Halbleiterlabor (HLL). Charge Collection Efficiency measurements have been performed, yielding a higher CCE than expected from the present radiation damage models. The interconnection of thin n-in-p pixels to the FE-I3 ATLAS electronics is under way, exploiting the Solid Liquid Interdiffusion (SLID) technique developed by the Fraunhofer Institut EMFT. In addition, preliminary studies aimed at Inter-Chip-Vias (ICV) etching into the FE-I3 electronics are reported. ICVs will be used to route the signals vertically through the read-out chip, to newly created pads on the backside. This should serve as a proof of principle for future four-side tileable pixel assemblies, avoiding the cantilever presently needed in the chip for the wire bonding.

We present the results of the characterization of silicon pixel modules employing n-in-p planar sensors with an active thickness of 150 $\mathrm{\mu}$m, produced at MPP/HLL, and 100-200 $\mathrm{\mu}$m thin active edge sensor devices, produced at VTT in Finland. These thin sensors are designed as candidates for the ATLAS pixel detector upgrade to be operated at the HL-LHC, as they ensure radiation hardness at high fluences. They are interconnected to the ATLAS FE-I3 and FE-I4 read-out chips. Moreover, the n-in-p technology only requires a single side processing and thereby it is a cost-effective alternative to the n-in-n pixel technology presently employed in the LHC experiments. High precision beam test measurements of the hit efficiency have been performed on these devices both at the CERN SpS and at DESY, Hamburg. We studied the behavior of these sensors at different bias voltages and different beam incident angles up to the maximum one expected for the new Insertable B-Layer of ATLAS and for HL-LHC detectors. Results obtained with 150 $\mathrm{\mu}$m thin sensors, assembled with the new ATLAS FE-I4 chip and irradiated up to a fluence of 4$\times$10$^{15}\mathrm{n}_{\mathrm{eq}}/\mathrm{cm}^2$, show that they are excellent candidates for larger radii of the silicon pixel tracker in the upgrade of the ATLAS detector at HL-LHC. In addition, the active edge technology of the VTT devices maximizes the active area of the sensor and reduces the material budget to suit the requirements for the innermost layers. The edge pixel performance of VTT modules has been investigated at beam test experiments and the analysis after irradiation up to a fluence of 5$\times$10$^{15}\mathrm{n}_{\mathrm{eq}}/\mathrm{cm}^2$ has been performed using radioactive sources in the laboratory.

Pixelated low-gain avalanche diodes (LGADs) can provide both precision spatial and temporal measurements for charged particle detection; however, electrical termination between the pixels yields a no-gain region, such that the active area or fill factor is not sufficient for small pixel sizes. Trench-isolated LGADs (TI-LGADs) are a strong candidate for solving the fill-factor problem, as the p-stop termination structure is replaced by isolated trenches etched in the silicon itself. In the TI-LGAD process, the p-stop termination structure, typical of LGADs, is replaced by isolating trenches etched in the silicon itself. This modification substantially reduces the size of the no-gain region, thus enabling the implementation of small pixels with an adequate fill factor value. In this article, a systematic characterization of the TI-RD50 production, the first of its kind entirely dedicated to the TI-LGAD technology, is presented. Designs are ranked according to their measured inter-pixel distance, and the time resolution is compared against the regular LGAD technology.

The microscopic damage produced in diodes made of n-type Magnetic Czochralski (MCz) silicon by 24 GeV and 26 MeV protons, up to the fluence of 1.3×1015cm-2 1 MeV equivalent neutrons, has been investigated and results are compared to the damage produced in devices made of standard Floating Zone (STFZ) silicon. It is found by means of Thermally Stimulated Currents (TSC) that the production of a radiation induced charged defect is enhanced in MCz, and might be in part responsible for the differences observed in the two materials at room temperature. The influence of defects on the sign of the space charge density has been studied by current transients at constant temperature i(T,t) and by Transient Current Technique (TCT). Type inversion is not revealed up to the highest investigated fluence. Full depletion voltage Vdep measurements versus fluence exhibits a minimum close to 2×1014cm-2 1 MeV equivalent neutrons; at the same fluence, Vdep measured as a function of annealing time changes its initial slope from positive to negative. It is shown by numerical simulations that these features can be accounted by the formation of a double junction, even in absence of type inversion.

Within the R&D Program for the luminosity upgrade proposed for the Large Hadron Collider (LHC), silicon strip detectors (SSD) and test structures (TS) were manufactured on several high-resistivity substrates: p-type Magnetic Czochralski (MCz) and Float Zone (FZ), and n-type FZ. To test total dose (TID) effects they were irradiated with 60Co gammas and the impact of surface radiation damage on the detector properties was studied. Selected results from the pre-rad and post-rad characterization of detectors and TS are presented, in particular interstrip capacitance and resistance, break-down voltage, flatband voltage and oxide charge. Surface damage effects show saturation after 150 krad and breakdown performance improves considerably after 210 krad. Annealing was performed both at room temperature and at 60 °C, and large effects on the surface parameters observed.

We present an R&D activity focused on the development of novel modules for the upgrade of the ATLAS pixel system at the High Luminosity LHC (HL-LHC). The modules consist of n-in-p pixel sensors, 100 or 200 $\mu$m thick, produced at VTT (Finland) with an active edge technology, which considerably reduces the dead area at the periphery of the device. The sensors are interconnected with solder bump-bonding to the ATLAS FE-I3 and FE-I4 read-out chips, and characterized with radioactive sources and beam tests at the CERN-SPS and DESY. The results of these measurements will be discussed for devices before and after irradiation up to a fluence of $5\times 10^{15}$ \neqcm. We will also report on the R&D activity to obtain Inter Chip Vias (ICVs) on the ATLAS read-out chip in collaboration with the Fraunhofer Institute EMFT. This step is meant to prove the feasibility of the signal transport to the newly created readout pads on the backside of the chips allowing for four side buttable devices without the presently used cantilever for wire bonding. The read-out chips with ICVs will be interconnected to thin pixel sensors, 75 $\mu$m and 150 $\mu$m thick, with the Solid Liquid Interdiffusion (SLID) technology, which is an alternative to the standard solder bump-bonding.

Thin planar pixel modules are promising candidates to instrument the inner layers of the new ATLAS pixel detector for HL-LHC, thanks to the reduced contribution to the material budget and their high charge collection efficiency after irradiation. 100-200 $\mu$m thick sensors, interconnected to FE-I4 read-out chips, have been characterized with radioactive sources and beam tests at the CERN-SPS and DESY. The results of these measurements are reported for devices before and after irradiation up to a fluence of $14\times10^{15}$ n$_{eq}$/cm$^2$. The charge collection and tracking efficiency of the different sensor thicknesses are compared. The outlook for future planar pixel sensor production is discussed, with a focus on sensor design with the pixel pitches (50x50 and 25x100 $\mu$m$^2$) foreseen for the RD53 Collaboration read-out chip in 65 nm CMOS technology. An optimization of the biasing structures in the pixel cells is required to avoid the hit efficiency loss presently observed in the punch-through region after irradiation. For this purpose the performance of different layouts have been compared in FE-I4 compatible sensors at various fluence levels by using beam test data. Highly segmented sensors will represent a challenge for the tracking in the forward region of the pixel system at HL-LHC. In order to reproduce the performance of 50x50 $\mu$m$^2$ pixels at high pseudo-rapidity values, FE-I4 compatible planar pixel sensors have been studied before and after irradiation in beam tests at high incidence angle (80$^\circ$) with respect to the short pixel direction. Results on cluster shapes, charge collection and hit efficiency will be shown.

Dark Matter In CCDs (DAMIC) is a silicon detector apparatus used primarily for searching for low-mass dark matter using the silicon bulk of Charge-Coupled Devices (CCDs) as targets. The silicon target within each CCD is 675 μm thick and its top surface is divided into over 16 million 15 μm × 15 μm pixels. The DAMIC collaboration has installed a number of these CCDs at SNOLAB. As of 2019, DAMIC at SNOLAB has reached operational conditions with leakage current less than 8.2 ×10-22 A cm-2 and a readout noise of 1.6 e, achieved with 5 CCDs. A new DAMIC apparatus will be installed at Laboratoire Souterrain de Modane in a few years. The DAMIC at Modane (DAMIC-M) collaboration will be using an improved version of CCDs designed by Lawrence Berkeley National Laboratory with skipper amplifiers that use non-destructive readout with multiple-sampling, enabling the CCDs to achieve a readout noise of 0.068 e. The low readout noise, in conjunction with low leakage current of these skipper CCDs, will allow DAMIC-M to observe physics processes with collisions energies as low as 1 eV. The DAMIC-M experiment will consist of an array of 50 large-area skipper CCDs with more than 36 million pixels in each CCD. The following proceeding will introduce the DAMIC apparatus at SNOLAB and its results and as well as the capabilities and the status of the new DAMIC-M experiment.

The luminosity upgrade of the CERN Large Hadron Collider (SLHC) imposes severe requirements on the radiation hardness of the tracking systems. The CERN RD50 collaboration as well as the Italian INFN SMART project (fifth commission) are focused on the study of new radiation hard materials and devices in view of this upgrade. Preliminary studies on irradiated high resistivity n- and p-type magnetic Czochralski silicon are described in this paper. Electrical characterization and microscopic defect studies were performed on a wide set of diodes made with both n- and p-type float zone and magnetic Czochralski silicon irradiated up to a nominal fluence of 3×1015 cm−2 1 MeV equivalent neutrons. The annealing behavior was studied in detail and a first evaluation of the damage-related parameters is shown.

Various structures for n-in-p planar pixel sensors have been developed at KEK in order to cope with the huge particle fluence in the upcoming LHC upgrades. Performances of the sensors with different structures have been evaluated with testbeam. The n-in-p devices were connected by bump-bonding to the ATLAS Pixel front-end chip (FE-I4A) and characterized before and after the irradiation to 1×1016 1 MeV neq/cm2. Results of measurements with 120 GeV/c momentum pion beam at the CERN Super Proton Synchrotron (SPS) in September 2012 are presented.

A new module concept for future ATLAS pixel detector upgrades is presented, where thin n-in-p silicon sensors are connected to the front-end chip exploiting the novel Solid Liquid Interdiffusion technique (SLID) and the signals are read out via Inter Chip Vias (ICV) etched through the front-end. This should serve as a proof of principle for future four-side buttable pixel assemblies for the ATLAS upgrades, without the cantilever presently needed in the chip for the wire bonding.

The results of the pre- and post-irradiation characterization of n- and p-type magnetic Czochralski silicon micro-strip sensors are reported. This work has been carried out within the INFN funded SMART project aimed at the development of radiation-hard semiconductor detectors for the luminosity upgrade of the large Hadron collider (LHC). The detectors have been fabricated at ITC-IRST (Trento, Italy) on 4 in wafers and the layout contains 10 mini-sensors. The devices have been irradiated with 24 GeV/c and 26 MeV protons in two different irradiation campaigns up to an equivalent fluence of 3.4×1015 1-MeV n/cm2. The post-irradiation results show an improved radiation hardness of the magnetic Czochralski mini-sensors with respect to the reference float-zone sample.

Reduced edge or ``edgeless'' detector design offers seamless tileability of sensors for a wide range of applications from particle physics to synchrotron and free election laser (FEL) facilities and medical imaging. Combined with through-silicon-via (TSV) technology, this would allow reduced material trackers for particle physics and an increase in the active area for synchrotron and FEL pixel detector systems. In order to quantify the performance of different edgeless fabrication methods, 2 edgeless detectors were characterized at the Diamond Light Source using an 11 μm FWHM 15 keV micro-focused X-ray beam. The devices under test were: a 150 μm thick silicon active edge pixel sensor fabricated at VTT and bump-bonded to a Medipix2 ROIC; and a 300 μm thick silicon strip sensor fabricated at CIS with edge reduction performed by SCIPP and the NRL and wire bonded to an ALiBaVa readout system. Sub-pixel resolution of the 55 μm active edge pixels was achieved. Further scans showed no drop in charge collection recorded between the centre and edge pixels, with a maximum deviation of 5% in charge collection between scanned edge pixels. Scans across the cleaved and standard guard ring edges of the strip detector also show no reduction in charge collection. These results indicate techniques such as the scribe, cleave and passivate (SCP) and active edge processes offer real potential for reduced edge, tiled sensors for imaging detection applications.

Silicon pixel modules employing n-in-p planar sensors with an active thickness of 200 $\mu$m, produced at CiS, and 100-200 $\mu$m thin active/slim edge sensor devices, produced at VTT in Finland have been interconnected to ATLAS FE-I3 and FE-I4 read-out chips. The thin sensors are designed for high energy physics collider experiments to ensure radiation hardness at high fluences. Moreover, the active edge technology of the VTT production maximizes the sensitive region of the assembly, allowing for a reduced overlap of the modules in the pixel layer close to the beam pipe. The CiS production includes also four chip sensors according to the module geometry planned for the outer layers of the upgraded ATLAS pixel detector to be operated at the HL-LHC. The modules have been characterized using radioactive sources in the laboratory and with high precision measurements at beam tests to investigate the hit efficiency and charge collection properties at different bias voltages and particle incidence angles. The performance of the different sensor thicknesses and edge designs are compared before and after irradiation up to a fluence of $1.4\times10^{16}n_{eq}/cm^{2}$.

We report on the processing and characterization of microstrip sensors and pad detectors produced on n- and p-type Magnetic Czochralski (MCz), Epitaxial (EPI) and Float Zone (FZ) silicon within the SMART project to develop radiation-hard silicon position sensitive detectors for future colliders. Each wafer contains 10 microstrip sensors with different geometries, several diodes and test structures. The isolation in the strip detectors produced on p-type material has been achieved by means of a uniform p-spray implantation, with doping of 3×1012 cm−2 (low-dose p-spray) and 5×1012 cm−2 (high-dose p-spray). The samples have undergone irradiations with 26 MeV protons and reactor neutrons up to ∼1016 cm−2 1 MeV equivalent neutrons (neq/cm2), and have been completely characterized before and after irradiation in terms of leakage current, depletion voltage and breakdown voltage. The current damage parameter α has been determined for all substrates. MCz diodes show less pronounced dependence of effective doping concentration Neff on the fluence when compared to standard FZ silicon, giving results comparable to diffusion oxygenated FZ devices for all irradiation sources. The observed increase of Neff with fluence can be interpreted in EPI material as a net donor introduction process, overcompensating the usual acceptor introduction process. This effect is stronger for 26 MeV proton irradiation than for neutron irradiation.

The depletion depth of irradiated n-type silicon microstrip detectors can be inferred from both the reciprocal capacitance and from the amount of collected charge. Capacitance voltage (C–V) measurements at different frequencies and temperatures are being compared with the bias voltage dependence of the charge collection on an irradiated n-type magnetic Czochralski silicon detector. Good agreement between the reciprocal capacitance and the median collected charge is found when the frequency of the C–V measurement is selected such that it scales with the temperature dependence of the leakage current. Measuring C–V characteristics at prescribed combinations of temperature and frequency allows then a realistic estimate of the depletion characteristics of irradiated silicon strip detectors based on C–V data alone.

Magnetic Czochralski (MCz) silicon is currently being considered as a promising material for the development of radiation tolerant detectors for future high luminosity HEP experiments. Silicon wafers grown by the MCz method have been processed by ITC-IRST (Trento, Italy) with a layout designed by the SMART collaboration. The diodes produced with n-type MCz material have undergone various irradiation campaigns, using 24 GeV/c (SPS-CERN) protons, 26MeV (FZK-Karlsruhe) protons and reactor neutrons (JSI-Ljubljana), with fluences up to 1016 1 MeV equivalent neutrons (neq)cm-2. This paper investigates space charge sign inversion effects after these irradiation levels. Samples have been characterized by reverse current and capacitance measurements before and after irradiation, and by Transient Current Technique (TCT) after irradiation. Results of the study of depletion voltage as a function of fluence and of TCT signal shapes show that Space Charge Sign Inversion has already occurred in the devices at a fluence of 4.2×1014neqcm-2 after 26 MeV proton irradiation, and at 5×1014neqcm-2 after neutron irradiation.

The presented R&D activity is focused on the development of a new pixel module concept for the foreseen upgrades of the ATLAS detector towards the Super LHC employing thin n-in-p silicon sensors together with a novel vertical integration technology. A first set of pixel sensors with active thicknesses of 75 μm and 150 μm has been produced using a thinning technique developed at the Max-Planck-Institut für Physik (MPP) and the MPI Semiconductor Laboratory (HLL). Charge Collection Efficiency (CCE) measurements of these sensors irradiated with 26 MeV protons up to a particle fluence of 1016neqcm−2 have been performed, yielding higher values than expected from the present radiation damage models. The novel integration technology, developed by the Fraunhofer Institut EMFT, consists of the Solid-Liquid InterDiffusion (SLID) interconnection, being an alternative to the standard solder bump-bonding, and Inter-Chip Vias (ICVs) for routing signals vertically through electronics. This allows for extracting the digitized signals from the back side of the readout chips, avoiding wire-bonding cantilevers at the edge of the devices and thus increases the active area fraction. First interconnections have been performed with wafers containing daisy chains to investigate the efficiency of SLID at wafer-to-wafer and chip-to-wafer level. In a second interconnection process the present ATLAS FE-I3 readout chips were connected to dummy sensor wafers at chip-to-wafer level. Preparations of ICV within the ATLAS readout chips for back side contacting and the future steps towards a full demonstrator module will be presented.

We present the results of the characterization of pixel modules composed of 75 μm thick n-in-p sensors and ATLAS FE-I3 chips, interconnected with the SLID (Solid Liquid Inter-Diffusion) technology. This technique, developed at Fraunhofer-EMFT, is explored as an alternative to the bump-bonding process. These modules have been designed to demonstrate the feasibility of a very compact detector to be employed in the future ATLAS pixel upgrades, making use of vertical integration technologies. This module concept also envisages Inter-Chip-Vias (ICV) to extract the signals from the backside of the chips, thereby achieving a higher fraction of active area with respect to the present pixel module design. In the case of the demonstrator module, ICVs are etched over the original wire bonding pads of the FE-I3 chip. In the modules with ICVs the FE-I3 chips will be thinned down to 50 um. The status of the ICV preparation is presented.

The Compact Linear Collider (CLIC) is a high-energy high-luminosity linear electron-positron collider under development. It is foreseen to be built and operated in three stages, at centre-of-mass energies of 380 GeV, 1.5 TeV and 3 TeV, respectively. It offers a rich physics program including direct searches as well as the probing of new physics through a broad set of precision measurements of Standard Model processes, particularly in the Higgs-boson and top-quark sectors. The precision required for such measurements and the specific conditions imposed by the beam dimensions and time structure put strict requirements on the detector design and technology. This includes low-mass vertexing and tracking systems with small cells, highly granular imaging calorimeters, as well as a precise hit-time resolution and power-pulsed operation for all subsystems. A conceptual design for the CLIC detector system was published in 2012. Since then, ambitious R&D programmes for silicon vertex and tracking detectors, as well as for calorimeters have been pursued within the CLICdp, CALICE and FCAL collaborations, addressing the challenging detector requirements with innovative technologies. This report introduces the experimental environment and detector requirements at CLIC and reviews the current status and future plans for detector technology R&D.

Both the current upgrades to accelerator-based HEP detectors (e.g. ATLAS, CMS) and also future projects (e.g. CEPC, FCC) feature large-area silicon-based tracking detectors. We are investigating the feasibility of using CMOS foundries to fabricate silicon radiation detectors, both for pixels and for large-area strip sensors. A successful proof of concept would open the market potential of CMOS foundries to the HEP community, which would be most beneficial in terms of availability, throughput and cost. In addition, the availability of multi-layer routing of signals will provide the freedom to optimize the sensor geometry and the performance, with biasing structures implemented in poly-silicon layers and MIM-capacitors allowing for AC coupling. A prototyping production of strip test structures and RD53A compatible pixel sensors was recently completed at LFoundry in a 150nm CMOS process. This presentation will focus on the characterization of pixel modules, studying the performance in terms of charge collection, position resolution and hit efficiency with measurements performed in the laboratory and with beam tests. We will report on the investigation of RD53A modules with 25x100 μm 2 cell geometry.

We are investigating the feasibility of using CMOS foundries to fabricate silicon detectors, both for pixels and for large-area strip sensors. The availability of multi-layer routing will provide the freedom to optimize the sensor geometry and the performance, with biasing structures in poly-silicon layers and MIM-capacitors allowing for AC coupling. A prototyping production of strip test-structures and RD53A compatible pixel sensors was recently completed at LFoundry in a 150$\,$nm CMOS process. This paper will focus on the characterization of irradiated and non-irradiated pixel modules, composed by a CMOS passive sensor interconnected to a RD53A chip. The sensors are designed with a pixel cell of $25\times100\,\mu \mathrm{m}^2$ in case of DC coupled devices and $50\times50\,\mu \mathrm{m}^2$ for the AC coupled ones. Their performance in terms of charge collection, position resolution, and hit efficiency was studied with measurements performed in the laboratory and with beam tests. The RD53A modules with LFoundry silicon sensors were irradiated to fluences up to $1.0\times10^{16}\,\frac{\mathrm{n}_\mathrm{eq}}{\mathrm{cm}^2}$.

The aim of this work is the development of radiation hard detectors for very high luminosity colliders. A growing interest has been recently focused on Czochralski silicon as a potentially radiation-hard material. We report on the processing and characterization of micro-strip sensors and pad detectors produced by ITC-IRST on n- and p-type magnetic Czochralski and float zone silicon. Part of the samples has been irradiated using 24 GeV/c protons (CERN-Geneva), while another part has been irradiated with 26 MeV protons (FZK-Karlsruhe) up to a fluence of 5×1015 1 MeV-neutron-equivalent/cm2. All the samples have been completely characterized before and after irradiation. Their radiation hardness as a function of the irradiation fluence has been established in terms of breakdown voltage, leakage current and evaluating the more relevant mini-sensor parameter variation. Moreover, the time evolution of depletion voltage, leakage current and inter-strip capacitance has been monitored in order to study their annealing behavior and space charge sign inversion effects.

Monitoring the manufacturing process of silicon sensors is essential to ensure stable quality of the produced detectors. During the CMS silicon sensor production we were utilising small Test Structures (TS) incorporated on the cut-away of the wafers to measure certain process-relevant parameters. Experience from the CMS production and quality assurance led to enhancements of these TS. Another important application of TS is the commissioning of new vendors. The measurements provide us with a good understanding of the capabilities of a vendor's process. A first batch of the new TS was produced at the Institute of Electron Technology in Warsaw Poland. We will first review the improvements to the original CMS test structures and then discuss a selection of important measurements performed on this first batch.

In the framework of the CMS experiment, a quality control of the silicon sensors production has been developed for the tracker construction. The emphasis here is on the process stability control based on the characterization of test-structures made of eight different components. The measurements carried out are presented. Then the set-up and the software developed for this purpose are explained. The first results, including the ones obtained on faulty batches of sensors, are shown.

The new ATLAS ITk pixel system will be installed during the LHC Phase-2 shutdown, to better take advantage of the increased luminosity of the HL-LHC. The detector will consists of five layers of stave-like support structures in the most central region and ring-shaped supports in the endcap regions, covering out to |η| < 4. While the outer three layers of the Pixel Detector are designed to operate for the full HL-LHC data taking period, the innermost two layers of the detector will be replaced around half of the lifetime. The ITk pixel detector will be instrumented with new sensors and readout electronics to provide improved tracking performance and radiation hardness compared to the current detector. Sensors will be read out by new ASICs based on the chip developed by the RD53 Collaboration. The design and recent results of 3D and planar sensor technologies will be discussed, together with the module concept to be implemented in the ITk pixel system. A description of the pixel off-detector readout electronics, implemented in the framework of the general ATLAS trigger and DAQ system, will also be given. Results of extensive tests which are being carried out to prove the feasibility of implementing serial powering, the baseline for the ITk pixel system and multi-module readout will be presented.

The ATLAS experiment will undergo around the year 2025 a replacement of the tracker system in view of the high luminosity phase of the LHC (HL-LHC) with a new 5-layer pixel system. Thin planar pixel sensors are promising candidates to instrument the innermost region of the new pixel system, thanks to the reduced contribution to the material budget and their high charge collection efficiency after irradiation. The sensors of 50-150 $\mu$m thickness, interconnected to FE-I4 read-out chips, have been characterized with radioactive sources and beam tests. In particular active edge sensors have been investigated. The performance of two different versions of edge designs are compared: the first with a bias ring, and the second one where only a floating guard ring has been implemented. The hit efficiency at the edge has also been studied after irradiation at a fluence of $10^{15}$ \neqcm. Highly segmented sensors will represent a challenge for the tracking in the forward region of the pixel system at HL-LHC. In order to reproduce the performance of 50x50 $\mu$m$^2$ pixels at high pseudo-rapidity values, FE-I4 compatible planar pixel sensors have been studied before and after irradiation in beam tests at high incidence angles with respect to the short pixel direction. Results on the hit efficiency in this configuration are discussed for different sensor thicknesses.

Thin planar silicon sensors with a pitch of 55 µm, active edge and various guard-ring layouts are investigated, using two-dimensional finite-element T-CAD simulations. The simulation results have been compared to experimental data, and an overall good agreement is observed. It is demonstrated that the 50 µm thick active-edge planar silicon sensors with floating guard-ring or without guard-ring can be operated fully efficiently up to the physical edge of the sensor. The simulation findings are used to identify suitable sensor designs for application in the high-precision vertex detector of the future CLIC linear e+ e− collider.

Both the current upgrades to accelerator-based HEP detectors (e.g. ATLAS, CMS) and also future projects (e.g. CEPC, FCC) feature large-area silicon-based tracking detectors. We are investigating the feasibility of using CMOS foundries to fabricate silicon radiation detectors, both for pixels and for large-area strip sensors. A successful proof of concept would open the market potential of CMOS foundries to the HEP community, which would be most beneficial in terms of availability, throughput and cost. In addition, the availability of multi-layer routing of signals will provide the freedom to optimize the sensor geometry and the performance, with biasing structures implemented in poly-silicon layers and MIM-capacitors allowing for AC coupling. A prototyping production of strip test structures and RD53A compatible pixel sensors was recently completed at LFoundry in a 150nm CMOS process. This presentation will focus on the characterization of pixel modules, studying the performance in terms of charge collection, position resolution and hit efficiency with measurements performed in the laboratory and with beam tests. We will report on the investigation of RD53A modules with 25x100 mu^2 cell geometry.

Radiation-tolerant n-in-p planar pixel sensors have been under development in cooperation with Hamamatsu Photonics K.K. (HPK). This is geared towards applications in high-radiation environments, such as for the future Inner Tracker (ITk) placed in the innermost part of the ATLAS detector in the high luminosity LHC (HL-LHC) experiment. Prototypes of those sensors have been produced, irradiated, and evaluated over the last few years. In the previous studies, it was reported that significant drops in the detection efficiency were observed after irradiation, especially under bias structures. The bias structures are made up of poly-Si or Al bias rails and poly-Si bias resistors. The structure is implemented on the sensors to allow quality checks to be performed before the bump-bonding process, and to ensure that charge generated in floating pixels due to non-contacting or missing bump-bonds is dumped in a controlled way in order to avoid noise. To minimize the efficiency drop, several new pixel structures have been designed with bias rails and bias resistors relocated. Several test beams have been carried out to evaluate the drops in the detection efficiency of the new sensor structures after irradiation. Newly developed sensor modules were irradiated with proton-beams at the Cyclotron and Radio-Isotope Center (CYRIC) in Tohoku University to see the effect of sensor-bulk damage and surface charge-up. An irradiation with γ-rays was also carried out at Takasaki Advanced Radiation Research Center, with the goal of decoupling the effect of surface charge-up from that of bulk damage. Those irradiated sensors have been evaluated with particle beams at DESY and CERN. Comparison between different sensor structures confirmed significant improvements in minimizing efficiency loss under the bias structures after irradiation. The results from γ-irradiation also enabled cross-checking the results of a semiconductor technology simulation program (TCAD).

The ATLAS experiment will undergo a major upgrade of the tracker system in view of the high luminosity phase of the LHC (HL-LHC) to start operation in 2026. The most severe challenges are to be faced by the innermost layers of the pixel detector which will have to withstand a radiation fluence of up to 1.4×10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">16</sup> n <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">eq</sub> /cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . Thin planar pixel modules are promising candidates to instrument these layers, thanks to the small material budget and their high charge collection efficiency after irradiation. Sensors of 100-200 μm thickness, interconnected to FE-I4 read-out chips, are characterized with radioactive sources as well as testbeams at the CERN-SPS and DESY. The performance of sensors irradiated up to a fluence of 5 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">15</sup> n <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">eq</sub> /cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> is compared in terms of charge collection and hit efficiency. Highly segmented sensors are a challenge for the tracking in the forward region of the pixel system at the HL-LHC. To reproduce the performance of 50×50 μm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> pixels at high pseudo-rapidities, FE-I4 compatible planar pixel sensors are studied before and after irradiation in beam tests at high incidence angle (80 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">°</sup> ) with respect to the short pixel direction. Results on cluster shape and hit efficiency will be shown.

The characterization of spacial and timing resolution of the novel Trench Isolated LGAD (TI-LGAD) technology is presented. This technology has been developed at FBK with the goal of achieving 4D pixels, where an accurate position resolution is combined in a single device with the precise timing determination for Minimum Ionizing Particles (MIPs). In the TI-LGAD technology, the pixelated LGAD pads are separated by physical trenches etched in the silicon. This technology can reduce the interpixel dead area, mitigating the fill factor problem. The TI-RD50 production studied in this work is the first one of pixelated TI-LGADs. The characterization was performed using a scanning TCT setup with an infrared laser and a $^{90}$Sr source setup.

This paper describes the proton irradiation campaign, performed at the INFN “Laboratori Nazionali del Sud” (LNS), on a silicon microstrip detector. The irradiated module is identical to the ones which are used to assemble the tracker inner barrel of the CMS experiment at the CERN Large Hadron Collider (LHC). The aim of the test was to verify the radiation resistance of the detector module to the LHC environment by checking its behavior with increasing fluence.

We present the results of the characterization of novel n-in-p planar pixel detectors, designed for the future upgrades of the ATLAS pixel system. N-in-p silicon devices are a promising candidate to replace the n-in-n sensors thanks to their radiation hardness and cost effectiveness, that allow for enlarging the area instrumented with pixel detectors. The n-in-p modules presented here are composed of pixel sensors produced by CiS connected by bump-bonding to the ATLAS readout chip FE-I3. The characterization of these devices has been performed with the ATLAS pixel read-out systems, TurboDAQ and USBPIX, before and after irradiation with 25 MeV protons and neutrons up to a fluence of 5x10**15 neq /cm2. The charge collection measurements carried out with radioactive sources have proven the feasibility of employing this kind of detectors up to these particle fluences. The collected charge has been measured to be for any fluence in excess of twice the value of the FE-I3 threshold, tuned to 3200 e. The first results from beam test data with 120 GeV pions at the CERN-SPS are also presented, demonstrating a high tracking efficiency before irradiation and a high collected charge for a device irradiated at 10**15 neq /cm2. This work has been performed within the framework of the RD50 Collaboration.

In view of the LHC upgrade phases towards HL-LHC the ATLAS experiment plans to upgrade the Inner Detector with an all silicon system. The n-in-p silicon technology is a promising candidate for the pixel upgrade thanks to its radiation hardness and cost effectiveness, that allow for enlarging the area instrumented with pixel detectors. We present the characterization and performance of novel n-in-p planar pixel sensors produced by CiS (Germany) connected by bump bonding to the ATLAS readout chip FE-I3. These results are obtained before and after irradiation up to a fluence of 10^16 1-MeV n_eq/cm^2, and prove the operability of this kind of sensors in the harsh radiation environment foreseen for the pixel system at HL-LHC. We also present an overview of the new pixel production, which is on-going at CiS for sensors compatible with the new ATLAS readout chip FE-I4.

The performance of pixel modules built from 75 μm thin silicon sensors and ATLAS read-out chips employing the Solid Liquid InterDiffusion (SLID) interconnection technology is presented. This technology, developed by the Fraunhofer EMFT, is a possible alternative to the standard bump-bonding. It allows for stacking of different interconnected chip and sensor layers without destroying the already formed bonds. In combination with Inter-Chip-Vias (ICVs) this paves the way for vertical integration. Both technologies are combined in a pixel module concept which is the basis for the modules discussed in this paper. Mechanical and electrical parameters of pixel modules employing both SLID interconnections and sensors of 75 μm thickness are covered. The mechanical features discussed include the interconnection efficiency, alignment precision and mechanical strength. The electrical properties comprise the leakage currents, tuning characteristics, charge collection, cluster sizes and hit efficiencies. Targeting at a usage at the high luminosity upgrade of the LHC accelerator called HL-LHC, the results were obtained before and after irradiation up to fluences of 1016neq/cm2.

The performance of pixel modules built from 75 micrometer thin silicon sensors and ATLAS read-out chips employing the Solid Liquid InterDiffusion (SLID) interconnection technology is presented. This technology, developed by the Fraunhofer EMFT, is a possible alternative to the standard bump-bonding. It allows for stacking of different interconnected chip and sensor layers without destroying the already formed bonds. In combination with Inter-Chip-Vias (ICVs) this paves the way for vertical integration. Both technologies are combined in a pixel module concept which is the basis for the modules discussed in this paper. Mechanical and electrical parameters of pixel modules employing both SLID interconnections and sensors of 75 micrometer thickness are covered. The mechanical features discussed include the interconnection efficiency, alignment precision and mechanical strength. The electrical properties comprise the leakage currents, tunability, charge collection, cluster sizes and hit efficiencies. Targeting at a usage at the high luminosity upgrade of the LHC accelerator called HL-LHC, the results were obtained before and after irradiation up to fluences of 1016 neq/cm (1 MeV neutrons).

The proposed luminosity upgrade of the Large Hadron Collider (S‐LHC) at CERN represents a technological challenge for the vertex detectors of the SLHC experiments since the innermost layers will receive fast hadron fluences up to 1016 cm−2. The CERN RD50 project has been established to explore detector materials and designs that will allow to operate devices up to this limit. Among the different research lines followed by RD50 we report on the development of sensors produced with substrates like Czochralski and epitaxial silicon and on the investigation of the radiation hardness of p‐type silicon detectors. Moreover innovative designs like thin, 3D and 3D‐STC sensors are under evaluation in the RD50 Collaboration.

The inner tracking system of the Compact Muon Solenoid experiment at the Large Hadron Collider consists of the world largest Silicon Strip Tracker. A detailed quality assurance program is under way to ensure the full compliance of all delivered sensors with the technical specifications. The focus will be here on the “Process Qualification Control” to monitor the stability of the fabrication process throughout the production phase. A description of the setup in the three laboratories involved (Florence, Strasbourg, Vienna) is given and the results obtained with the first delivered batches are shown.

For the high luminosity phase of the Large Hadron Collider to start operation around 2026, a major upgrade of the ATLAS Inner Tracker (ITk) is in preparation. Thanks to their low power dissipation and high charge-collection efficiency after irradiation, thin planar pixel modules are the baseline option to instrument all, except for the innermost layer of the pixel detector. To optimise the sensor layout for a pixel cell size of 50×50 μm2, TCAD simulations are being performed. Charge-collection efficiency, electronic noise and electrical-field properties are investigated. A radiation-damage model is employed in TCAD simulations to estimate the performance before- and after irradiation. The impact of storage time at room temperature for the ITk pixel detector during maintenance periods are estimated using sensors irradiated up to a fluence of 5×1015 neq/cm2. Pixel sensors of 100−150 μm thickness, interconnected to FE-I4 read-out chips with pixel dimensions of 50×250 μm2, are characterised using the testbeam facilities at the CERN-SPS and DESY. The charge-collection and hit efficiencies are compared before and after annealing at room temperature for up to one year.

The charge collected from beta source particles in single pad detectors produced on p-type Magnetic Czochralski (MCz) silicon wafers has been measured before and after irradiation with 26 MeV protons. After a 1 MeV neutron equivalent fluence of 1×1015cm-2 the collected charge is reduced to 77% at bias voltages below 900 V. This result is compared with previous results from charge collection measurements.

The CMS MIP Timing Detector, proposed for the HL-LHC upgrade, will be instrumented with O(10) square meters of ultra-fast Silicon detectors (UFSD) in the forward region.These UFSDs are aimed at measuring the time of passage of each track with a precision of about 30 ps.The sensor that will be used for this task is the low gain avalanche detectors (LGAD).In this contribution, we will present the latest results from laboratory measurements on 50 and 35 µm thick LGADs fabricated by CNM, in the framework of the AIDA-2020 project.We will concentrate on the timing performance of the sensors.Additionally the electrical characterisation of the sensor will be discussed.

The ATLAS experiment will undergo a major upgrade of the tracker system in view of the high luminosity phase of the LHC (HL-LHC) to start operation in 2026. The most severe challenges are to be faced by the innermost layers of the pixel detector which will have to withstand a radiation fluence of up to $1.4\times10^{16}\,$n$_\text{eq}$/cm$^{2}$. Thin planar pixel modules are promising candidates to instrument these layers, thanks to the small material budget and their high charge collection efficiency after irradiation. Sensors of $100-200\,\mu$m thickness, interconnected to FE-I4 read-out chips, are characterized with radioactive sources as well as testbeams at the CERN-SPS and DESY. The performance of sensors irradiated up to a fluence of $5\times 10^{15}\,$n$_\text{eq}$/cm$^{2}$ is compared in terms of charge collection and hit efficiency. Highly segmented sensors are a challenge for the tracking in the forward region of the pixel system at the HL-LHC. To reproduce the performance of $50$x$50\,\mu$m$^2$ pixels at high pseudo-rapidities, FE-I4 compatible planar pixel sensors are studied before and after irradiation in beam tests at high incidence angle ($80^\circ$) with respect to the short pixel direction. Results on cluster shape and hit efficiency will be shown.

Using the SLID-ICV technology from Fraunhofer EMFT ('Solid-liquid-InterDiffusion' and 'Inter Chip Vias'[1]) thin pixel sensors (75μm-150μm) with 50μm × 400μm pixel size are connected to the readout ASICs (ATLAS FE-I3). These technologies offer the possibility to construct pixel detectors for application in high energy physics (and elsewhere) with improved properties like smaller pixel size, less material, better fill factor, and backside connectivity. The project is performed in two stages. First sensor and ASIC are connected with the SLID technology. In a second stage this concept will be complemented with vias. Results of step one and status of step two will be reported.

We present the results of the characterization of pixel modules composed of 75 um thick n-in-p sensors and ATLAS FE-I3 chips, interconnected with the SLID (Solid Liquid Inter-Diffusion) technology. This technique, developed at Fraunhofer-EMFT, is explored as an alternative to the bump-bonding process. These modules have been designed to demonstrate the feasibility of a very compact detector to be employed in the future ATLAS pixel upgrades, making use of vertical integration technologies. This module concept also envisages Inter-Chip-Vias (ICV) to extract the signals from the backside of the chips, thereby achieving a higher fraction of active area with respect to the present pixel module design. In the case of the demonstrator module, ICVs are etched over the original wire bonding pads of the FE-I3 chip. In the modules with ICVs the FE-I3 chips will be thinned down to 50 um. The status of the ICV preparation is presented.

We present the results of the characterization of novel n-in-p planar pixel detectors, designed for the future upgrades of the ATLAS pixel system. N-in-p silicon devices are a promising candidate to replace the n-in-n sensors thanks to their radiation hardness and cost effectiveness, that allow for enlarging the area instrumented with pixel detectors. The n-in-p modules presented here are composed of pixel sensors produced by CiS connected by bump-bonding to the ATLAS readout chip FE-I3. The characterization of these devices has been performed with the ATLAS pixel read-out systems, TurboDAQ and USBPIX, before and after irradiation with 25 MeV protons and neutrons up to a fluence of 5x1015 neq/cm2. The charge collection measurements carried out with radioactive sources have proven the feasibility of employing this kind of detectors up to these particle fluences. The collected charge has been measured to be for any fluence in excess of twice the value of the FE-I3 threshold, tuned to 3200 e. The first results from beam test data with 120 GeV pions at the CERN-SPS are also presented, demonstrating a high tracking efficiency before irradiation and a high collected charge for a device irradiated at 1015 neq/cm2. This work has been performed within the framework of the RD50 Collaboration.

on behalf of the RD50 CollaborationThe need for radiation hard semiconductor detectors for the tracker regions in high energy physics experiments at a future high luminosity hadron collider, like the proposed LHC upgrade, has led to the formation of the CERN RD50 collaboration.The R&D directions of RD50 follow two paths: the optimization of radiation hard bulk materials (Material Engineering) and the development of new detector designs (Device Engineering) as 3D sensors, thin sensors and n-in-p sensors.Some of the RD50 most recent results about silicon detectors are reported in this paper, with special reference to: (i) identification of defects responsible for long term annealing, (ii) charge collection efficiency of irradiated planar devices, in particular n-in-p microstrip detectors and epitaxial diodes, (iii) charge collection efficiency of double-type column 3D detectors, (iv) comparison of the performances of FZ and MCZ structures under mixed irradiation.

The presented R&D activity is focused on the development of a new detector for the upgrade of the ATLAS pixel system at SLHC at CERN, Geneva, employing thin pixel sensors together with a novel vertical integration technology. It consists of the Solid-Liquid-InterDiffusion (SLID) interconnection, which is an alternative to the standard solder bump-bonding, and Inter Chip Vias (ICV) for routing the signal vertically through the readout chips. The SLID interconnection is characterized by a very thin eutectic Cu-Sn alloy, achieved through the deposition of 5 μm of Cu on both sides, and 3 μm of Sn on one side only. The thin pixels are connected by the SLID process to the read out ASICs in the “chip to wafer” approach using tested known good dies. The inter chip vias are placed in the r/o chips before the SLID process in the “via last” approach. This approach gives the highest flexibility for the choice of the sensor and ASIC technology. The best possible sensors can be produced in a highly specialized technology on a dedicated process line and then in subsequent post-processing bonded to r/o ASICs coming from a standard CMOS line.

The ATLAS collaboration will replace its tracking detector with new all silicon pixel and strip systems. This will allow to cope with the higher radiation and occupancy levels expected after the 5-fold increase in the luminosity of the LHC accelerator complex (HL-LHC). In the new tracking detector (ITk) pixel modules with increased granularity will implement to maintain the occupancy with a higher track density. In addition, both sensors and read-out chips composing the hybrid modules will be produced employing more radiation hard technologies with respect to the present pixel detector. Due to their outstanding performance in terms of radiation hardness, thin n-in-p sensors are promising candidates to instrument a section of the new pixel system. Recently produced and developed sensors of new designs will be presented. To test the sensors before interconnection to chips, a punch-through biasing structure was implemented. Its design was optimized to decrease the possible tracking efficiency losses observed. After irradiation, they were caused by the punch-through biasing structure. A sensor compatible with the ATLAS FE-I4 chip with a pixel size of 50×250 μm2, subdivided into smaller pixel implants of 30×30 μm2 size was designed to investigate the performance of the 50×50 μm2 pixel cells foreseen for the HL-LHC. Results on sensor performance of 50×250 and 50×50 μm2 pixel cells in terms of efficiency, charge collection and electric field properties are obtained with beam tests and the Transient Current Technique.

We present an R&D activity aiming towards a new detector concept in the framework of the ATLAS pixel detector upgrade exploiting a vertical integration technology developed at the Fraunhofer Institute IZMMunich. The Solid-Liquid InterDiffusion (SLID) technique is investigated as an alternative to the bump-bonding process. We also investigate the extraction of the signals from the back of the read-out chip through Inter-Chip-Vias to achieve a higher fraction of active area with respect to the present ATLAS pixel module. We will present the layout and the first results obtained with a production of test-structures designed to investigate the SLID interconnection efficiency as a function of different parameters, i.e. the pixel size and pitch, as well as the planarity of the underlying layers.

We present a readout chip prototype for future pixel detectors with timing capabilities. The prototype is intended for characterizing 4D pixel arrays with a pixel size of $100\times100~\mu \text{m}^2$, where the sensors are Low Gain Avalanche Diodes (LGADs). The long-term focus is towards a possible replacement of disks in the extended forward pixel system (TEPX) of the CMS experiment during the High Luminosity LHC (HL-LHC). The requirements for this ASIC are the incorporation of a Time to Digital Converter (TDC) within each pixel, low power consumption, and radiation tolerance up to $5\times10^{15}~n_\text{eq}\text{~cm}^{-2}$ to withstand the radiation levels in the innermost detector modules for $3000 \text{fb}^{-1}$ of the HL-LHC (in the TEPX). A prototype has been designed and produced in 110~nm CMOS technology at LFoundry and UMC with different versions of TDC structures, together with a front end circuitry to interface with the sensors. The design of the TDC will be discussed, with the test set-up for the measurements, and the first results comparing the performance of the different structures.

Thin planar silicon sensors with a pitch of 55um, active edge and various guard ring layouts are investigated, using two-dimensional finite-element T-CAD simulations. The simulation results have been compared to experimental data, and an overall good agreement is observed. It is demonstrated that 50um thin planar silicon sensors with active edge with floating guard ring or without guard ring can be operated fully efficiently up to the physical edge of the sensor. The simulation findings are used to identify suitable sensor designs for application in the high-precision vertex detector of the future CLIC linear $e^+e^-$ collider.

In view of the high luminosity phase of the LHC (HL-LHC) to start operation around 2026, a major upgrade of the tracker system for the ATLAS experiment is in preparation. The expected neutron equivalent fluence of up to 2.4×1016 1 MeV neq./cm2 at the innermost layer of the pixel detector poses the most severe challenge. Thanks to their low material budget and high charge collection efficiency after irradiation, modules made of thin planar pixel sensors are promising candidates to instrument these layers. To optimise the sensor layout for the decreased pixel cell size of 50×50 μm2, TCAD device simulations are being performed to investigate the charge collection efficiency before and after irradiation. In addition, sensors of 100−150 μm thickness, interconnected to FE-I4 read-out chips featuring the previous generation pixel cell size of 50×250 μm2, are characterised with testbeams at the CERN-SPS and DESY facilities. The performance of sensors with various designs, irradiated up to a fluence of 1×1016 neq./cm2, is compared in terms of charge collection and hit efficiency. A replacement of the two innermost pixel layers is foreseen during the lifetime of HL-LHC . The replacement will require several months of intervention, during which the remaining detector modules cannot be cooled. They are kept at room temperature, thus inducing an annealing. The performance of irradiated modules will be investigated with testbeam campaigns and the method of accelerated annealing at higher temperatures.

The CMS and ATLAS detectors will face challenging conditions after the upgrade of the LHC to the High Luminosity LHC.In particular, the granularity of the pixel detectors should increase to mitigate the effect of pileup.Two possible sensor geometries are being investigated, 50 × 50 µm 2 and 25 × 100 µm 2 , to handle these conditions.One of the main factors in choosing the pixel geometry is inter-channel charge induction or crosstalk, defined as the ratio of charge induced into neighboring pixels relative to the total charge.This charge induction will affect the data rates, position resolution, and track reconstruction efficiencies.Therefore, it should be investigated carefully.The effect of crosstalk is expected to depend on the chosen pixel geometry, threshold of the signal, and readout front-end.The readout chip in this study is RD53A, developed by the RD53 Collaboration, which is a prototype investigated by both the CMS and ATLAS collaborations implementing three different analog front-end designs.Crosstalk effects are larger for the 25 × 100 µm 2 geometry, given the larger sensor capacitance.Both have been studied in the lab through direct charge injection, and also at DESY test beam facility by charge deposition of 5.6 GeV electrons in 150 µm thick silicon pixels.The effects on the cross-talk due to varying the front-end, threshold, and the impinging position of the electrons will be presented.

Thin planar silicon sensors with a pitch of 55um, active edge and various guard ring layouts are investigated, using two-dimensional finite-element T-CAD simulations. The simulation results have been compared to experimental data, and an overall good agreement is observed. It is demonstrated that 50um thin planar silicon sensors with active edge with floating guard ring or without guard ring can be operated fully efficiently up to the physical edge of the sensor. The simulation findings are used to identify suitable sensor designs for application in the high-precision vertex detector of the future CLIC linear $e^+e^-$ collider.

The research activity of the SMART project, a collaboration of Italian research institutes funded by the I.N.F.N., has been focused on the development of radiation hard silicon position sensitive detectors for the CERN Large Hadron Collider luminosity upgrade. Electrical characterization of pad and micro-strip devices as well as Transient Current Technique studies on the bulk material has been carried out on n- and p-type 4" silicon wafers, grown with Standard Float Zone (SFZ), high resistivity Magnetic Czochralski (MCz) and epitaxial (EPI) techniques. The produced devices have been irradiated at very high fluences with 24 GeV/c, 26 MeV protons and with reactor neutrons up to ~10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">16</sup> n <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">eq</sub> /cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . Their radiation hardness as a function of the irradiation fluence has been established in terms of breakdown voltage, leakage current and Space Charge Sign Inversion.

Both the current upgrades to accelerator-based HEP detectors (e.g. ATLAS, CMS) and also future projects (e.g. CEPC, FCC) feature large-area silicon-based tracking detectors. We are investigating the feasibility of using CMOS foundries to fabricate silicon radiation detectors, both for pixels and for large-area strip sensors. A successful proof of concept would open the market potential of CMOS foundries to the HEP community, which would be most beneficial in terms of availability, throughput and cost. In addition, the availability of multi-layer routing of signals will provide the freedom to optimize the sensor geometry and the performance, with biasing structures implemented in poly-silicon layers and MIM-capacitors allowing for AC coupling. A prototyping production of strip test structures and RD53A compatible pixel sensors was recently completed at LFoundry in a 150nm CMOS process. This presentation will focus on the characterization of pixel modules, studying the performance in terms of charge collection, position resolution and hit efficiency with measurements performed in the laboratory and with beam tests. We will report on the investigation of RD53A modules with 25x100 mu^2 cell geometry.

Event topologies characterized by photonic final states at LEP2 energies are analyzed by the OPAL Collaboration in order to study gauge boson couplings. Results on neutral triple gauge boson couplings are presented, based on e+e−→Zγ events collected at 189 GeV. e+e−→W+W−γ and e+e−→νν̄γ events are studied to measure charged quartic gauge boson couplings, whereas neutral quartic boson vertices are investigated by using e+e−→qq̄γγ events. Searches for Higgs bosons with an enhanced coupling to photon pairs are also based on event topologies characterized by two photons in the final state, at center-of-mass energies between 91 and 108 GeV. The prospects for these analyses at future colliders are discussed.